Design, Implement, and Test a Timer: Prototype Product - Lab Report Example

Design, implement, and test a timer (Prototype Product) EXPERIMENT REPORT SUBMISSION Design and Test of Delay Unit The Objectives of the experiment were: To investigate the property of 555 chip through experiments To construct a 555- based delay unit To devise and build a trigger circuit To devise and test a Voltage Controlled Oscillator (VCO) To make my practicle skills in electrical design components strong Background information 555 timer Figure 1.0 illustrates all the pin outs of a 555- timer chip. Every pin has is specific purpose. The role of the pins are described below: Pin 1 – it is the ground pin. It attaches to the zero voltage rails. Pin 2 – shows the trigger pin. Its sole purpose is to detect a third rail voltage for it to be HIGH. In case this pin goes into a LOW mode and pin number^ is also LOW, then the result is that the output pin remains in a HIGH condition. If pin ^ happens to be in a HIGH state and pin 2 in a LOW state, this results in a LOW output. Throughout this time, pin number 2 demonstrates a high impedance of 10M ohms. This impedance is activated at around 1uA. Pin 3 – also known as the output pin on this chip. If pin 3 and pin 7 happen to be in phase, Pin 3 is forced to go to a higher state; of about 2V less than the rail, whereas The LOW state is reached at around the voltage of about 0V to 0.5V. This denotes that pin 3 will produce only 200mA Pin 4 – also known as the RESET pin; it is constantly connected internally to a HIGH state via a 100k resistor. The voltage must be below 0.8V for this pin to be reset. Pin 5. Also called the control pin of the 555 timer chip. This pin varies the timing of the RC network when the voltage applied to this pin varied. Pin 6 – this is the threshold pin of the chip. Its function is to detect two thirds of the rails voltage for it to produce a LOW output when pin 2 is in a HIGH state.this pin has very high impedance and thus it is activated at around 1uA. Pin 7 –this is identified as the discharge pin; when pin 2 is at a HIGH state this pin goes LOW when the 6th pin detects two thirds of the rail voltage. Pin 8 – this pin acts as the power supply pin on this chip. It is attached to the positive rail. 555 timer oscillator A 555 timer based oscillator is a circuit that produces high and clear free waveforms. One can easily manipulate the output of these waveforms by connecting an RC circuit to a capacitor and two resistors. This circuit demonstrates a relaxation oscillator that generates stable squire waveforms.these waveforms may comprise of duty cycles that are varying from 50-100% or may have fixed frequency of around 500 kHz. These are different from monostable circuit that stops after the pre set time has elapsed; this oscillator has its own triggering mechanism which is arrived at by interfacing the trigger input pin2 and pin6 which is the threshold voltage. This feture qualifies this device as a stable oscillator circuit. Figure 1.1 demonstrates a 555 timer oscillator circuit and the potential waveforms at different values of the VCC Figure 1.2: 555 shows timer oscillator circuit and the waveforms The oscillator circuit above, shows pin two and pin six connected together. This permit the circuit to have a self-triggering mechanism in each operation cycle. Thus the circuit can be said to be operation free running oscillator. 555 timer chip as a voltage controlled oscillator The circuit on figure 1.3 illustrates a 555-timer based voltage-controlled –oscillator (jojo 2009 n.d) Figure 1.3: voltage controlled oscillator This circuit above shows a voltage-to-frequency converter; this is so because the output frequency can be manipulated varying the input voltage. Pin 5 the voltage control pin controls the trigger and the optimum levels. The voltage at this particular pin is given as two third of the Vcc. This results from the internally build voltage divider. If an external voltage is applied at this specific point the control voltage can be changed. The voltage across the capacitor also termed as the timing capacitor I illustrated on figure1.3 the charging and discharging time of the capacitor increase if the voltage is increased. In turn, this reduces the frequency; we can thus conclude that the frequency can be manipulated by varying the control voltage. 555 timer based delay circuit This circuit is used to delay a pulse. Figure 1.4 shows the timer based delay circuit. Resistor VR1 can be used to vary the delay time of this circuit. The value of the capacitor E is thus based on the time delay formula shown below: The reset pin 4 must be at a high state and trigger pin 2’s voltage level to drop below a third of the VCC for the output pin to be at a HIGH state. When no pulse is applied on the chip’ input, the transistor Q1 turns on and the capacitor is charged. Transistor Q1 is turned off and the reset pin4 is maintained at a HIGH state when a pulse is applied at the input. In turn this discharges the capacitor E via the resistor VR1. The time delay is dependant on the discharge capacitor. This in turn gets it to a third of the VCC just before the 555 timer’s output goes high. Figure 1.4: 555 shows a timer based delay circuit Equipment and components 555 timer oscillator Equipment used Oscilloscope Digital multi-meter (DMM) A solder less breadboard Dc power supply unit (PSU) The Components involved: Chips: LMC55CN LEDs Resistors (330kΏ, 220k, 5x100k, 1k, 2x5.1k, 1k, 82, Capacitor (F): 10n, 22n, 100u (tantalum) On/off switch The procedure used: The following procedures were followed in designing this experiment 1. The circuit show on figure 1.6 was built on a breadboard 2. The output was connected to the oscilloscope 3. Both the minimum and the maximum values for V2 and Vout were recorded. The durations for Vout= high and low and the period of the signal was recorded 4. The waveform of the Vout with the waveform of VC for the NOR gate was compared. 5. The value of RA was increased to 330k ohm and step 1 was repeated 6. The value of RA was reset to 100k and RB was changed to 330k. Step (a) in test 1 was repeated Test 3 1. The values of RA and RB were set to be equal. That is RA=RB. 2. The measurement on test 1 (a) was repeated. Test 4 1. The supply voltage Vcc was reduced to 3V 2. The measurement on test 1 (a) was repeated. Figure 1.6: 555 illustrates timer osillator circuit 555 timer chip as a voltage controlled oscillator 1. The Vcc was set to 9V 2. A voltage of 5V was applied to pin 5 3. The values of V5 were varied between 0 to 8 V at steps of 1V The delay unit 1. A circuit show on figure 1.5 was built 2. The switch was closed and time was recorded 3. The value of R was doubled to 200K Observations, data, Findings and results 555 timer oscillator Test one produced the following results; displayed by the graph Figure 1.7: screenshot of a graph for 555 timer oscillator Results of test 2 are shown on figure 1.9 below The graph below on figure 2.0 was obtained as a result of resetting the value of RA to 100k, and changing the value of RB to 330k. c) The waveform shown on figure 2.1 was obtained by adding a NOR gate to the oscillator. Test 3 After setting the values of RA and RB to 100k and reducing the supply voltage to 6V, the following graph shown on figure 2.2 was obtained. Results for test 4 On reducing the supply voltage to 3V and repeating the test on test 1 (a), a graph shown on figure 2.3 As evidenced by the results obtained on test 3 and 4, the relationship between Vcc and the following results can be acquired from the readings Maximum value of V2 Minimum value of V2 And the maximum value of Vout 555 chip as a voltage controlled oscillator (VCO) Results shown in table 1.0 were obtained from the 555 timer based VCO Results Discussion Results on 555 timer oscillator As evidenced by the graphs obtained in the tests conducted, it is illustrated that, the capacitor is charging up to two thirds of the VCC. This process can be linked to the equations Equation one above demonstrates the charging time while equation two shows is the discharging time. The frequency of the circuit is related by the equation three shown below. Based on the frequency equation, it can be said that frequency changes with changing resistor and capacitor values. It is maximum when these values are at minimum Plotting the graphs Graph one, a graph of V minimum against V5 A graph of V2 maximum against V5 A graph of Vout Max against the V5 References Anil K. Maini 2007, Digital Electronics, Principle, Devices and Application, John Wiley and Son Limited, England Collin Mitchell 2012, 50-555 timer circuits, Talking Electronics HFB400UB Datashhet 1994, integrated circuits database, Philips electronics Professor Barry Parton 1998, Fundamentals of Digital Electronics, National Instrument Corporation Read More