Applications of FPGA - Case Study Example

?Digital System Applications Table of Contents Table of Contents 2 Introduction 3 FPGA Devices 5 FPGA Design Development 7 Applications of FPGA 8 Implementation Process 9 Multi-Function Registers 11 24-Hour Digital Clock Using Multiplexed 7- Segment Display 11 Conclusion 17 References 18 Introduction Digital systems and applications detail the innovation in system design as well as in cutting edge applications which have emerged to take benefits of the fields thereby increasing the periphery of sophisticated technologies. A digital system is a combination of various devices which are designed to manipulate the logical information or the physical quantities which have been represented in digital form. This signifies that the quantities can only take discrete values. The digital devices are mostly electronic. Though, they can also be mechanical, pneumatic or even magnetic. Digital computers along with calculators, digital video and audio equipment as well as the telephone system which is the globe’s leading digital system are a few examples of the most familiar digital systems around the globe1. There are however various benefits that are obtained from digital systems. They have been mentioned as follows: The digital systems are mostly very convenient to design. The main reason is that in digital system only switching circuits are used which use the array that is high or low in which they lie and it does not take into account the exact value of voltage or the current. Moreover, it is very easy to store information in a digital system. It is carried on by certain special devices or circuits which can grab digital information and retain it for as long as necessary. In addition, the mass storage of the techniques can store billions of bits of information in a relatively small physical space1. It is easy to maintain accuracy and precision throughout the system because once a signal has been digitized the information contained by it does not deteriorate as it progresses. The operations in a digital system can also be programmed. It is easy to design the digital system whose operations are managed by programs (a set of stored instructions). Digital systems are also less affected by noise. Spurious fluctuations in the noise are not as critical in a digital system as the exact volume of the voltage is not that important as long as the noise does not stop individuals from distinguishing a high from a low. More digital circuitry can be fabricated on an Integrated Circuit (IC) chip. Even though analog system has also been benefited from the massive development of IC technology, its relative complexity and also the usage of the devices cannot be economically integrated. This limitation has prevented the analog system from obtaining the same degree of integration as that of the digital system1. There are very few limitations which are inherent in the digital system. The two biggest among them are as follows: Firstly, most of the physical quantities are analog in nature and therefore these quantities are mostly the input and the output that have been monitored, operated on and controlled by a system like temperature, pressure, flow rate, liquidity level, and velocity among others. These quantities can be expressed in the digital way when there is a need to make it more precise and specific. However, a digital approximation is generally made in the analog quantity. Secondly, the other limitation is that the whole world is analog and as a true fact processing digitalized signals indeed takes a very long time1. In order to take advantages of the digital techniques when dealing with the analog inputs and outputs the four steps which must be followed are as follows: 1. The first step includes converting the physical variable to an electrical signal (analog). 2. The second step is transforming the electrical (analog) signal into the digital signal. 3. The next step that follows is processing or operating on the digital information. 4. The last step is converting the digital outputs back to the real world analog form1 With these considerations, the main objective of the report is to highlight the usage and importance of Field-Programmable Gate Array (FPGA) and to implement further Sequential Logic Circuits in VHSIC Hardware Description Language (VHDL). Based on these understandings design, implementation and demonstration of a 24-hour digital clock will be provided with the aid of the Xilinx boards. FPGA Devices FPGAs were brought into reckoning in the year 1985 by Xilinx Company. FPGAs have emerged as the ultimate solution to the time– to–time market as well as the risk problems mainly because they provide instant manufacturing and relatively cheap prototypes. It is of utmost importance that the risks mainly the financial risk which have been incurred in the development of the new products be reduced so that more new ideas can be developed or prototyped. An FPGA has the advantage of being manufactured in only a few minutes and the cost of the prototypes are mainly of the order of US$1002. If the present scenario is considered, over the last three years FPGAs have grown rapidly from a tiny market niche into a US$200 million business. One billion Dollars’ worth of FPGAs is sold every year from 1996 and this represents a very significant proportion of the IC market. The interconnections among the elements are generally user–programmable. Since its inception in 1985, several FPGAs were developed by an assortment of organisations including Actel, Algotronix, Altera, Plessey, Plus, Quick Logic, Advanced Micro Devices (AMD), Concurrent Logic and Crosspoint. An FPGA comprises an assortment of uncommitted features that can be interconnected among solutions. FPGAs have the inherent advantage of being used in a wide variety of applications. The two main benefits of FPGAs are that it has a lower prototype based cost and also a shorter production related time. However, the disadvantage of FPGAs is that it has lower speed of operation and a lower logic density. A typical circuit will be slower by a factor of three if it is implemented or used in FPGA. Typical FPGAs are a factor of 8 to 12 times less density than a Micro Pin Grid Array (MPGA) which is manufactured in a similar IC fabrication process. If an FPGA requires a larger area for the same amount of logic circuitry, it implies that fewer FPGA chips are produced and hence a lower yield will be likely. At higher production volumes this means that an FPGA is expensive2. Programmable devices have played a key role in the design of the digital hardware. They are usually the general purpose chips that can be configured for a large number of applications. The first type of programmable device which has attained extensive use was Programmable Read–Only Memory (PROM). In general, there are generally two versions of PROM which can be programmed by manufacturers and by the end users. The first being mask programmable and the other being field programmable2. In the context of applying logic circuits, superior speed performance can be obtained with mask–programmable chip as the connections within the devices can be hardwired during manufacture. Field programmable connections always involve some sort of programmable switch such as fuse which is comparatively slower as compared to a hardwired connection. A field–programmable device has the advantage that outweighs the shortcomings in the speed performance, which are as follows: 1. The field programmable chips are less expensive at lower volumes in comparison with mask programmable devices as they are more standardized off-the-shelf parts. 2. The field programmable chips can be programmed immediately in a few minutes whereas the mask programmable devices are programmed in a period of weeks or sometimes even months2. FPGA Design Development A typical FPGA structure comprises a two dimensional grouping of logic blocks that can be connected by general interconnection resources. ‘The interconnect’ encompasses segments of wire wherein they are of various lengths. Programmable devices are present in the interconnect that connects the logic blocks to the wire segments or one wire segment to the other wire segment. The logic circuits are implemented in FPGA by separating the logics in the individual logic blocks and subsequently interconnecting the different blocks as desired. It is important that FPGA are versatile as much as conceivable in order to facilitate the implementation of a large number of circuits. There are various ways to design an FPGA concerning trade–offs in the flexibility and complexity of both logic blocks as well as the interconnection resources2. Applications of FPGA FPGAs can be used in almost all applications currently using Mask–Programmed Gate Arrays, Programmable Logic Devices (PLDs) and Small Scale Integration (SSI) logic chips. Certain varieties of them have been depicted below: 1. Application – Specific Integrated Circuits (ASICs): An FPGA is particularly suited for implementing ASIC. 2. Implementation of Random Logic: One FPGA can incorporate a circuit that may necessitate ten to twenty Programmable Array Logic (PALs). This factor may augment drastically in the future. 3. Replacing of SSI Chips for Random Logic: SSI chips can be reduced with FPGAs which may in turn require a decrease in the area on circuit boards carrying such chips. 4. Prototyping: FPGAs are suited ideally for prototyping applications. 5. FPGA–Based Compute Engines: A whole new class of computers has been made possible with the development of the in–circuit re-programmable FPGAs. 6. On–Site Re –configuration of Hardware: FPGAs are attractive when there is a need to change the structure of any given machine which is in operation2. Implementation Process In order to make use of FPGAs, it is necessary to have access to an efficient Computer-Aided Design (CAD) system. The steps required in a typical CAD system for the implementation of a circuit in an FPGA have been summarised below: 1. The starting point for the design process is the initial logic entry of the circuit which is to be implemented. This step may encompass drawing a schematic by using a schematic capture program entering a VHDL description or postulating a Boolean expression. The circuit description is generally translated into standardised form such as Boolean programs6. 2. The object may be alternatively minimised to the number of the stages of logic block in a time critical path and this is often referred as delay optimisation6. 3. The next step that follows after having mapped the circuit into blocks is deciding where to exactly place each block in the FPGA array. Usually a placement program is used to solve this program. A typical placement of the algorithms trial to minimise the length of ‘the interconnect’ is required for the resulting placement. In general, a technology map issue may be used to map algorithms for FPGAs6. 4. The final step in the CAD system is performed by the routing software. A routing software generally assigns the FPGA’s wire segments and chooses programmable switches to form the requisite connections in the logic blocks. The routing software must also ascertain that 100 per-cent of the requisite connections are formed. If it is not formed then the circuit cannot be realised in single FPGA6. Upon completing the placement and the routine steps successfully, the CAD’s system’s output is fed to a programming unit and this configures the final FPGA chip. This whole step can take a few minutes to about an hour. However, it also depends on which FPGA is being used2. Sequential Logic Circuti in VHDL (Shift Register) Source: 3 Multi-Function Registers4 24-Hour Digital Clock Using Multiplexed 7- Segment Display In order to prepare a design of 24-hour digital clock by using Multiplexed 7- Segment Display, certain steps need to be followed, these include: Firstly, it is required to determine the alarm clock design. Subsequently, there is need to gain an understanding regarding the Xilinx clock code of Multiplexed 7-segment display. After that, necessary comments are required to be input in the clock.vhdl code. Moreover, there is a need to create a 60 Hertz minutes signal which would be derived from the clock. Then, a 100 Hertz test signal is needed to be generated from clock. After that, clock display needs to be changed to hh:mm format. A rollover change needs to be made for hours as well as minutes to a format of 24 hour time. Subsequently, FPGA implementation is needed to be made. A time counter algorithm is needed to be made after retaining the LED decimal point flashing code. A VHDL testbench is required to be written in order to conclude the design5. Design of All Parts of the System The mechanism of preparing a 24-Hour digital clock by Multiplexed 7- Segment Display would require designing a few related parts. 24-Hour digital clock Block Diagram6 Design of Spartan-3 Board As a Part of Digital Clock Display7 Design Of 24-Hour Digital Clock Incorporated On a Spartan-3 FPGA Development Board5 Design of a Counter Using Schematic Approach Design of A Counter Related to 24-Hour Digital Clock Display8 Design Simulation and Results With regard to design simulation and results, the simulation has been made with the aid of VHDL test bench by using Xilinx. The functional view of clock display is depicted below which shows the simulation results. Clock wave form has been generated from the results which show a repetitive arrangement. The various test signals depicted anticipated starting value of 12:015. The LED out signals has been demonstrated through mounted LED on the board. The digit out signal controls the 7 segment display. There is also a decoder output signal for each digit. Full Functionality of the Designed System The following design shows the way to create a digital clock and to show the output to the multiplexed 7 segment display in VHDL. Source:9 In the above figure, there are 8 control lines which light a specific segment on the LED. 4 anode control lines in turn define which character responds. The digital system as of today requires Hardware Description Language (HDL) to design. Another modern inclination to design digital circuit is by utilisation of graphic symbols or block diagrams which may signify higher-level design related constructs. Source:9 The standard approach is: 4 characters = 32 I/O pins. The advantage of this is that it saves 20 pins and the limitation is that it requires that FPGA logic constantly scans characters9. Conclusion To define the behaviour of FPGA, the user needs to provide a Hardware Description language (HDL) or a schematic design. The choice of the ASICs or the FPGAs is completely case dependent. Optimum profitability is ensured only by a mix of both good design technique and implementation. Moreover, in order to design a 24-hour digital clock using multiplexed 7- segment display it is imperative to identify proper VHDL code and make FPGA implementation. References Bohn, P. A. ‘Alarm Clock VHDL Project Digilent Spartan- 3’. Northeastern University, , 2006, (accessed 5 July 2013). Digilent, ‘Spartan-3 Board’. Products. , 2009, (accessed 15 July 2013). Emant Pte Ltd, ‘12h/24h Digital Clock Circuit Design Using 7493’. Home. , 2013, (accessed 15 July 2013). Francis, R. J., Rose, J., Vranesic, Z. G. Field Programmable Gate Arrays. VLSI, computer architecture and digital signal processing The Kluwer international series in engineering and computer science Volume 180 of The Kluwer international series in engineering and computer science. VLSI, computer architecture and digital signal processing. Springer, USA, 1992. George Mason University. ‘Digital Logic Review’, Shift Registers, , n.d. (accessed 5 July 2013). Jain, R. P. & Anand, M. S. Digital Electronics Practice Using Integrated Circuits. Tata McGraw-Hill Education, India, 1984. Spartan. Digital Clock for Spartan-3 Starter Board, Four-Character, 7-Segment LED Display, , 2013, (accessed 5 July 2013). Tocci, R. J. Digital Systems: Principles and Applications. Pearson Education India, India, 1980. University of Ottawa. ‘Multifunction Register with T-Flip Flops’, Computer Architecture, n.d. (accessed 5 July 2013). Read More