Completed Tasks Analysis - Essay Example

This task was completed using analysis of inverters, NAND and NOR gates, the basic tools in digital circuit and analysis. It introduces the learners to the digital circuit which is a key concept in the understanding of circuit systems.

The experiment requires the use of various apparatuses such as a MultiMate/Ammeter and a DC power supply. Other components such as a 100pF capacitor and a CD4007 Array MOSFET are also necessary.

Estimated the circuit’s noise margins NMH and NML through mathematical calculations.
Arranged the circuit setup as shown in Fig. 6.3. Set VDD to 5V DC.
Plotted a graph of the output voltage, VOUT versus the input voltage, VIN in an Excel sheet.
Conducted circuit simulation using PSpice.
Estimated the gradient of transfer characteristics, NMH and NML from the circuit simulation data.

Restructured the set-up in Fig. 6.3 by adding a square wave input signal of 5Vpp and 1kHz frequency and extracting the DC supply.
Calculated the following; Propagation delay (tP), Power dissipation (PD) and Delay-power product (DP) from the experimental values.
Simulated the circuit using Pspice and verified estimated readings (tPHL, tPLH, and tP) with a PSpice output.

For each of the gates in Fig. 6.4.of NOR and NAND gates, the truth tables were established.
A complete circuit simulation procedure for each gate was performed using Pspice. Circuit simulation enabled the verification and validation of the output.

For this section, we carried out a Vout versus Vin DC Sweep Analysis. When the information was plotted in Excel our concentration and main area of interest was where the slant of out was -1. NMH and NML were, therefore, realized through the estimation, Pspice, and fittings and established the matching results.

Performed an exhaustive Transient Analysis of Vout against Vin. Pspice and mathematical figuring criteria were jointly applied in determining both ascent deferral and the fall postponement time. Each of the two methods was predictable with each other since the available information was a Vpulse.

The last part involved the execution of NAND and NOR doors in Pspice. By rotating high and low flag ports, A and B, different sets of results were obtained. The first set, on account of the NOR door, recorded a high yield of Y when both A and B were low. The second set, on account of the NAND entryway, yielded low Y when both A and B were high.

This lab was relevant and helpful in that it allowed us to meet our main objective of familiarizing ourselves with advanced circuits. These goals were achieved through a keen analysis of straightforward exhaustive circuits. Read More