The Fabrication of the Pentacene Thin Film Transistor - Research Proposal Example

Literature Review: The Fabrication and Characterisation of the Pentacene Thin Film Transistor Organic electronic devices, especially the organic thin-film transistors, have presented rapid progress and promise within the past few years. Pentacene, which is a fused-ring polycyclic aromatic hydrocarbon, presents relatively high carrier mobility when used for fabricating the organic thin-film transistors and this means that pentacene is widely used as the active material in such transistors. It is possible to use a variety of substrates and fabrication processes when using pentacene and the thin-film transistors made using pentacene present excellent electrical characteristics. Organic thin-film transistors now present characteristics comparable to devices made using hydrogenated amorphous silicon (a-Si:H). Because pentacene thin-film transistors now show promise, it makes sense to prepare a literature review for fabrication methods and characterisation of such thin-film transistors and this effort examines selected literature for the pentacene thin-film transistor. Contents Introduction 1 Literature Review for the Fabrication and Characterisation of the Pentacene Thin Film Transistor 4 Conclusion 16 Bibliography / References 18 (This page intentionally left blank) Introduction Thin-film transistors, or TFTs, are widely used in the electronic flat panel industry and every flat panel display contains millions of such transistors (Kagan, 2003, Chapter 1). The world is now using more flat panel displays than ever before and less of the conventional cathode ray display technologies, with many giant factories around the world churning out millions of TFT displays annually. In addition to flat panel displays, TFTs are find application in active matrix liquid crystal flat panel displays, active matrix all organic flat panel displays, active matrix imagers, large sensor arrays and smart tags for price and inventory applications (Klauk, 2000, Pp. 63 – 64). It has been more than six decades since the conceptualisation of the TFT and over time new materials, structures and fabrication techniques have emerged for these transistors. However, the monocrystalline materials, such as gallium arsenide (GaAs), that showed the greatest promise for fabrication of high-speed TFTs are expensive to source in the required purity and costly to process, rendering manufacturing of large-area devices manufactured using such materials prohibitively expensive (Kagan, 2003, Chapter 6). Thus, efforts persisted to try to use organic materials, such as polythiophene, oligothiophenes, pentacene and other small molecule organic materials, which were low cost, cheaper to process at room temperature and lightweight despite the fact that such materials could not offer fast switching and presented a large number of defects for a large area. Fortunately, the response time requirements for the human eye did not require the fastest switching times for TFTs for flat panel display applications. According to Kolb (2005, Pp. 1 – 6), most organic materials are electrical insulators with a relatively low conductivity at room temperature in the range of 10−9 - 10−14 S cm−1. However, certain organic solids, such as bromine/perylene complex exhibit conductivity in the range of 10−1 S cm−1 and this makes it possible to use such organic solids for fabricating TFTs. The performance of TFTs made using organic materials has improved over time with better fabrication techniques and design (Klauk, 2000, Pp. 63 – 64). Pentacene, (C22H14), which belongs to a family of polyacenes, presents an interesting option for use in the fabrication of TFTs because it presents a strong tendency for packing into parallel layers, with a capacity for standing on many substrates while presenting high career mobility (Kagan, 2003, Chapter 6, Section 6.4.2.3). In addition, this compound presents the highest hole and electron mobility of small organic molecules (Knipp, 2002, Pp. 347 – 348). Yet, a thorough understanding of the transport mechanism in polycrystalline films remains elusive (Knipp, 2003, Pp. 347 – 348). Vacuum deposition techniques involving thin films of pentacene deposited on a variety of substrates presents high-performance TFT devices, with processing at relatively low temperatures being possible. In addition, it is possible to use thermal evaporation to fabricate TFTs using this compound. Pentacene is a polycyclic aromatic hydrocarbon with five fused benzene rings, with its structure presented in the figure below (Pichierri, 2006, “Pentacene”). Researchers state that TFTs fabricated using pentacene present excellent electrical characteristics, with field effect mobility in excess of 1.5 cm /V-s, on/off current ratio larger than one hundred million, and subthreshold slope as low as1.6 V/dec (Klauk, 1999, Pp. 1258). Figure 1: Molecular Structure of Pentacene (Kagan, 2003, Section 6.4.2.3) This literature review examines a selection of the available literature related to the fabrication and characterisation of pentacene TFTs in an attempt to learn more about this type of transistors and to understand better their fabrication and potential for application in electronics. Literature Review for the Fabrication and Characterisation of the Pentacene Thin Film Transistor Prior to discussing fabrication techniques for pentacene TFTs, it is probably right to examine the structure of a typical pentacene organic TFT, because this helps with the understanding for fabrication methods. The figure below presents a cross-section of a pentacene TFT on a glass substrate to illustrate the essential elements for such a transistor (Klauk, 1999, Pp. 1258). In addition, an idealised TFT is in the figure that follows (Kolb, 2005, Pp. 6). However, it is important to note that although the essential structures in a TFT that is fabricated using various techniques remains the same the device geometry may change. The drain, source, gate dielectric and electrodes as well as the active layer on a substrate are essential elements of all TFTs (Kagan, 2003, Chapter 1). In a TFT, the negative channel of an electron channel device, or the positive channel of a hole channel device is the source, with the opposite channel being the drain. Voltage applied at the gate controls conduction with a “pinch off” voltage shutting off conduction and the control of the display points, or pixels, in a flat panel is by a matrix of transistors that controls transmission of the three primary constituents of white light, red, blue and green (Kagan, 2003, Chapter 1). Clearly, millions of TFTs control pixels to present an image on a flat display screen. Figure 2: Schematic cross-section of Pentacene Thin Film Transistor on a Glass Substrate (Klauk, 1999, Pp. 1258) Figure 3: An Idealised Thin Film Transistor (Kolb, 2005, Pp. 6) Kolb (2005, Pp. 14) suggests that it is possible to fabricate pentacene TFTs by a combination of thermal evaporation of pentacene to form the semiconductor layer on silicon substrate, deposition of dielectric by ion-beam sputtering and use of evaporation or electron – beam evaporation. The previously mentioned author suggests evaporation of pentacene by using thermal evaporation in a vacuum chamber to deposit the semiconductor layer on silicon substrates. Yagi (2004, Pp. 168 – 171) states that the surface roughness of the pentacene thin films deposited using thermal evaporation methods, consisting of controlled grain structures decreases with increasing substrate temperature and decreasing flux rate because of change in grain structure. According to the previously mentioned author, it is important to understand that the surface roughness of the channel surface is of considerable importance in the fabrication of a TFT because the operational performance of the TFT varies with fluctuations in surface roughness. It is important to try to grow large grains because carrier mobility reduces at grain boundary and large grains permit more carrier mobility. Puigdollers (2003, Pp. 367 – 370) states that it is possible to grow pentacene films on substrates at room temperature under conditions of high vacuum in a chamber, with a base pressure of mbar. High deposition rates of greater than 20 Å / sec are possible using this technique. According to the previously mentioned author, it is possible to increase substantially the conductivity of pentacine films grown this way by dipping these films in a solution of iodine in acetonitrile (5 mgy300 ml) for short times (-1 h). Thus, a need for working at high temperature does not always exist when fabricating pentacine thin films, but a need exists for creating high vacuum. The previously mentioned author carried out further research into the fabrication of pentacene TFTs with polymeric gate dielectrics with polymethyl methacrylate (PMMA) for gate dielectric using thermal evaporation at a maximum process of 170 ºC (Puigdollers, 2004, Pp. 67 – 71). Pentacene deposition at room temperature in a high vacuum chamber with base pressure of mbar produced TFTs that present the following characteristics (Puigdollers, 2004, Pp. 67 – 71): Figure 4: Drain – Source Current as a Function of Drain – Source Voltage, with Gate-Source Voltage as a Parameter (Puigdollers, 2004, Pp. 69) Figure 5: Drain – Source Current as a Function of Gate – Source Voltage, with Drain-Source Voltage set at -40V and ION=IOFF ratio from -20 to 20 V of over a thousand (Puigdollers, 2004, Pp. 69) Figure 6: Square Root of Drain – Source Current as a Function of Drain – Source Voltage, with Gate-Source Voltage in the Saturation Region (Puigdollers, 2004, Pp. 69) As mentioned earlier, it is important to note that for higher carrier mobility and superior TFT performance, a need exists for larger crystals with larger crystal boundaries (Puigdollers, 2004, Pp. 70 - 71). Deposition of pentacene at moderate temperatures of 60º C and at low deposition rates of 1 Å / sec are stated by the previously mentioned author as being capable of producing large crystal boundaries. In addition, because pentacene crystal grains grow around core of impurities on the surface exposed to deposition of pentacene, it helps to expose the dielectric surface for pentacene deposition. Thus, coating the gate dielectric for deposition of pentacene with monolayer of organic cyclohexene helps with larger crystals and higher carrier mobility. However, according to the previously mentioned author a need exists for a process optimisation phase that determines the optimal evaporation and process parameters needed for optimal pentacene grain size. Hu (2005, Pp. 2260 – 2266) presents a discussion about deposition of pentacene films on different surfaces and the orientation and shape of the molecules deposited. The previously mentioned authors suggest that pentacene films deposited on different surfaces exhibit different morphologies, with pentacene grains deposited on Au being smaller and rod-shaped, while deposits on self-assembled monolayers (SAMs) are larger and more island like. Thus, it is clear that the choice of material for deposition of pentacene for making the TFTs is important because as mentioned previously, a requirement exists for large crystals and large crystal boundaries for high carrier mobility. Ordered molecular packing in pentacene crystals is crucial for high mobility because of the fewer trap sites present in the crystals. The degree of π – orbital overlap that exists between adjacent molecules facilitates the charge hopping process and the self-assembled monolayers of various terminal functional groups exert similar effects in aligning pentacene molecules perpendicular to the surface. Thus, microcontact printing techniques help control molecular orientation packing to form a template for area selective alignment. The previously mentioned technique is useful for fabrication of the vertical organic field effect transistor. Thus, the choice of the material for deposition of pentacene film is important. According to Kolb (2005, Pp. 11 – 12), prior to thermal evaporation of the pentacene, cleaning of silicon substrates using acetone in an ultrasound bath followed by further cleaning using peroxymonosulphuric acid for thirty minutes removes surface contaminants, including phenols, alcohols, aldehydes and ketones. Etching using hydrosulphuric acid removes the oxidation on the wafer. Subsequent to the previous treatment, placing the wafer in an oxidation furnace at 1100 degrees Celsius for about ninety minutes presents an oxide thickness of 110 – 130 nm on the surface. Placing this oxidised silicon wafer, with a layer of silicon dioxide in dimethyldichlorosilane, (DMDS), solution for around 5 minutes presents a hydrophobic layer on the silicon dioxide that helps increase the carrier mobility in the transistor. After thermal evaporation of the pentacene, evaporation of gold through a shadow mask creates the source and drain contacts while isolating the transistors within a specified channel width that depends on the shadow mask that is used. Kolb (2005, Pp. 12) goes further to present alternative methods for fabricating gates using spin-coating of photoresist, followed by soft baking and exposure to ultra violet light that results in exposed resist. Prior to the evaporation of aluminium through a mask on cleaned exposed resist, removal of the exposed silicon dioxide takes place using hydrofluoric acid. The thermal evaporation of pentacene after cleaning of a substrate using cleaning agents that are suited to the substrate is also the method for fabrication of a pentacene TFT described in Schroeder (2003, Pp. 3201 – 3203). However, thermal evaporation is not the only way in which it is possible to deposit pentacene on a suitable substrate material and the use of organic vapour - phase deposition technique receives a mention in literature (Rolin, 2006, Pp. 89 – 90). According to Rolin (2006, Pp. 89 – 90), deposition of pentacene using thermal evaporation in a high vacuum presents complexity in the manufacturing process and diminishes the process throughput for manufacturing involving large area substrates. Thus, researchers have designed alternative strategies for depositing polycrystalline thin films of organic materials on substrates that are much faster, yet more controlled (Rolin, 2006, Pp. 89 – 90). Liquid phase deposition techniques use designed small molecules with side groups for easy delivery. Such small molecules lend themselves to the use of printing techniques. The other alternative is to use Open Vapour Phase Deposition (OVPD) using a heated gas for transporting organic molecules for deposition on substrates. Heated nitrogen presents an example of a gas used for deposition of organic molecules, such as pentacene, on to substrates as shown in the figure below and the rate of flow of the carrier gas controls the deposition rate. Figure 7: Organic Vapour Phase Deposition for Thin Film Transistors (Rolin, 2006, Pp. 89) Kwon (2007, Pp. 615 – 617) presents a method for fabricating pentacene TFTs that uses solution based dielectrics. Transfer of pentacene deposited on an ultraviolet curable poly (urethaneacrylate) mould (PUA) to a substrate after exposure to ultra violet light of specific wavelength of 250 – 400 nm for a few tens of seconds with a dose of 100 mJ / square cm transfers the pentacene structure, that is the gate formation for the TFT, on to the substrate. After peeling off the mould without the pentacene deposited gate structure the TFT structure is ready, with the cured mould available for more transfer operations involving transfer of pentacene gate structures to substrates. Knipp (2003, Pp. 347 – 355) presents an investigation about the structural and transport properties of evaporated pentacene organic thin film transistors (TFTs) for deposition conditions and the effect of different organic dielectrics. The previously mentioned authors noted that the roughness of the dielectric used for deposition influences the structure and morphology of the deposited pentacene film. Films on specially prepared smooth silicon nitride present improved structural properties for the pentacene film. Changing surface wetting to present a more hydrophobic surface, results in mobility improvements by factors of 2 – 3. It is important to have low-cost substrates for low-cost electronic TFTs and the previously mentioned authors state that sputtered Al2O3, sputtered silicon oxide or plasma-enhanced chemical vapour deposited (PECVD), silicon nitride, and silicon oxide are examples of dielectrics that demonstrate a capacity for large area fabrication with high carrier mobility. The fabrication process for PECVD silicon nitride is already established and well known, with TFTs produced using PECVD silicon nitride presenting 0.4 cm2/Vs and on/off ratios of more than eight orders of magnitude. Conclusion It is clear from the previous discussion that a number of fabrication techniques exist for manufacturing pentacene TFTs. Research has already established that organic TFTs present advantages over TFTs based on inorganic semiconductors because it is possible to fabricate organic TFTs at lower temperatures and significantly lower costs compared to TFTs based on inorganic semiconductors (Klauk, 2000, Pp. 63). The literature review demonstrates that by judiciously selecting the material on which deposition will take place, the fabrication process and the fabrication parameters, it is possible to fabricate a wide variety of TFTs and ICs using the TFTs. Because pentacene film TFTs are cheaper and less complicated to fabricate and the TFT technology has the capacity for contributing to the manufacturing of complicated electronic devices, it is very likely that the organic and pentacene thin film technology will continue to play an important role in the future of electronics and technology. (This page intentionally left blank) Bibliography/ References Hu, W. Et al. 2004. Molecular Orientation of Evaporated Pentacene Films on Gold: Alignment Effect of Self-Assembled Monolayer. Langmuir, 2005, 21 (6), Pp 2260–2266. Retrieved: June 30, 2010, from: http://pubs.acs.org/doi/abs/10.1021/la047634u Dimitrakopoulos, C. D. & Mascaro, D. J. 2001. Organic Thin Film Transistors: A Review of Recent Advances. IBM J. RES. & DEV. VOL. 45 NO. 1 JANUARY 2001. Retrieved: June 30, 2010, from: EBSCO. Kagan, Cherie R. & Andry, Paul (Editors). 2003. Thin – Film Transistors. CRC Press. Klauk, Hagen & Jackson, Thomas N. 2000. Pentacene Organic Thin-Film Transistors and ICs. Solid State Technology, March 2000, Pp. 63 – 76. Retrieved: June 30, 2010, from: EBSCO. Knipp, D. Street, R. A. & Volkel, A. & Ho, J. 2002. Pentacene thin film transistor on inorganic dielectrics: Morphology structural properties, and electronic transport. Journal of Applied Physics, Volume 93, Issue 1, Pp. 347-355 (2003). Retrieved: June 30, 2010, from: http://jap.aip.org Kolb, D.2005. Pentacene-based organic transistors. School of Engineering University of Durham. Retrieved: June 30, 2010, from: http://www.eco.li/writings-talks/PhD/yr1-PentaceneTransistors.pdf Kwon, T. Baek, C. & Lee, Hong H. 2007. Top gate Pentacene Thin Film Transistor with Spin-Coated Dielectric. Organic Electronics, Volume 8, Issue 5, October 2007, Pages 615-620. Retrieved: June 30, 2010, from: www.ScienceDirect.com Pichierri, Fabio. 2006. Pentacene. Tohoku University, Sendai, Japan. Retrieved: July 1, 2010, from: http://www.chm.bris.ac.uk/motm/pentacene/pentacene.htm Park, Dongkyu et al. 2009. Electrical Characterization of Pentacene-Based Organic Thin-Film Transistors. Journal of the Korean Physical Society, Vol. 54, No. 2, February 2009, Pp. 687_691. Retrieved: June 30, 2010, from: EBSCO. Puigdollers. J. Et al. 2003. Pentacene thin film transistor with polymeric gate dielectric. Organic Electronics, 5 (2004), 67 – 71. Retrieved: June 30, 2010, from: www.ScienceDirect.com Puigdollers. J.2003.Pentacene thin-film obtained by thermal evaporation in high vacuum. Thin Solid Films, Volume 427, Issues 1-2, 3 March 2003, Pages 367-370. Retrieved: June 30, 2010, from: www.ScienceDirect.com Rao, I.V.K. Mandal, S. Katiyar, M.2007. Effect of Pentacene Deposition Rate on Device Characteristics of Top Contact Organic Thin Film Transistors. Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop. Retrieved: June 30, 2010, from: http://ieeexplore.ieee.org/Xplore/login.jsp?url=http%3A%2F%2Fieeexplore.ieee.org%2Fiel5%2F4459058%2F4472437%2F04472597.pdf%3Farnumber%3D4472597&authDecision=-203 Rolin .C. 2006. Pentacene Devices and Logic Gates Fabricated by Organic Vapor Phase Deposition. Appl. Phys. Letters. 89, 203502 (2006). Retrieved: June 30, 2010, from: http://apl.aip.org/aPplab/v89/i20/p203502_s1?isAuthorized=no Schroeder. R. 2003. A study of the Threshold Voltage in Pentacene Organic Field Transistors. Applied Physics Letters, Volume 83, No. 15, October 13, 2003, Pp. 3201 – 3203. Retrieved: June 30, 2010, from: http://www.omec.org.uk/pubs/apl03-3201.pdf Yagi. I. Tsukagoshi, K. & Aoyagi, Y. 2003. Growth control of Pentacene films on SiO2/Si substrates towards formation of flat conduction layers. Thin Solid Films, Volume 467, Issues 1-2, 22 November 2004, Pages 168-17. Retrieved: June 30, 2010, from: www.ScienceDirect.com Read More