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Digital electronics - Essay Example

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A flip-flop circuit can be constructed from two NAND gates or two NOR gates. If we feed a flip-flop in a variety of ways, then it gives rise to different types of flip-flops. The J-K…
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Download file to see previous pages Another application for Flip-Flops is division frequency devices.
From J-K flip-flop can be used to build a frequency divider by taking the output of one cell to the clock input of the next. The J and K inputs of each flip-flop are set to 1 to produce a toggle at each cycle of the clock input. For each two toggles of the first cell, a toggle is produced in the second cell, so its output is at half the frequency of the first.
Specifically, the combination J = 1, K = 0 is a command to set the flip-flop; the combination J = 0, K = 1 is a command to reset the flip-flop; and the combination J = K = 1 is a command to toggle the flip-flop, i.e., change its output to the logical complement of its current value.
Both PS and CLR HIGH, a negative-going CLK, and J and K at 0, or LOW. In this condition the FF holds the previous condition of the output. In this case the FF is reset. If the circuit were set when these inputs occurred, it would remain set.
In the following experiment we build a binary counter using J-K flip-flops by taking the output of one cell to the clock input of the next. The J, K inputs of each flip-flop are set to 1 to get toggle at each clock pulse. For each two toggles of the first cell, a toggle is produced in the second cell, and so on. This produces a binary counter device. The count can be in forward or backward direction making a modification like shown below.
The BCD counter showed above can be build using several binary counters but with a small modification, by terminating the count when the count reaches decimal 9 or binary 1001. Since the next toggle would set the two most significant bits a NAND gates tied from those two outputs to the asynchronous clear line will start the count over after 9.
A 2-bit binary counter using two J-K flip-flops is done by taking the output Q of one J-K flip-flop to the clock input of the next. The J, K inputs of each flip-flop are set to 1 to ...Download file to see next pagesRead More
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