Design of Delay Unit - Lab Report Example

Design of Delay Unit Objectives of the experiment The main objectives of carrying out this lab experiments were: To explore the property of 555 chip through experiments To design and test a Voltage Controlled Oscillator (VCO) To build a 555- based delay unit To design and build a trigger circuit To strengthen my practical skills in electrical design components Background information Pin 1 – this is the ground pin. It connects to the zero voltage rail. Pin 2 – this is the trigger pin. It normally detects a third of the rail voltage for it to be HIGH. When this pin goes into LOW mode and Pin number 6 is LOW, then the output pin remains in HIGH state. If pin 6 is at HIGH state and pin 2 is at LOW state, then the output remains LOW. During this time, Pin 2 has a very high impedance of about 10M ohms. This impedance triggers at about 1uA. Pin 3 – this is the output pin of this chip. If this pin and pin 7 are in phase, Pin 3 goes to a high state. High in this case means 2V less than the rail. The LOW state means a voltage of about 0.5V to 0V. This means that the pin will deliver only 200mA Pin 4 – this is the RESET pin. This pin is always internally connected to HIGH state through a 100k resistor. For the chip to be reset, the voltage must be below 0.8V. Pin 5. This is the control pin of 555 timer chip. When voltage applied to this pin is varied, it varies the timing of the RC network considerably. Pin 6 – this is the threshold pin of the chip. This pin detects two thirds of the rail voltage for it to make a LOW state output only if pin two is in HIGH state. This pin contains a very high impedance and triggers at about 1uA. Pin 7 – this is known as the discharge pin. This pin goes low when pin six detects two third of the rail voltage. But for this to happen, pin two must be in HIGH state. Pin 8 – this pin serves as the power supply pin of the chip. It is connected to the positive rail. 555 timer oscillator A 555 timer based oscillator is a circuit that generates highly and clear free running waveforms. The output frequency of these waveforms can be adjusted by connecting an RC circuit with one capacitor and two resistors. This circuits is a type of the general relaxation oscillator which generates square waveforms that are stable. These waveforms can have a fixed frequency of about 500 kHz or it can have duty cycles that are varying from fifty to a hundred percent. Unlike monostable circuits that stops after the pre-set time has elapsed, this oscillator circuit has a re-triggering mechanism achieved by interfacing the trigger input pin two and pin six which is the threshold voltage. This makes the device to be an astable oscillator circuit. Figure 1.1 shows a 555 timer oscillator circuit and the possible waveforms at different values of the VCC (electronics.tutorials n.d) Figure 1.2: 555 timer oscillator circuit and the waveforms In the above oscillator circuit, pin two and pin six are connected together. This allows the circuit tio have a self-triggering mechanism in each operation cycle. This makes the circuit’s operation a free running oscillator. 555 timer chip as a voltage controlled oscillator The circuit show on figure 1.3 shows a 555-timer based voltage-controlled –oscillator (jojo 2009 n.d) Figure 1.3: voltage controlled oscillator This circuit is also known as voltage-to-frequency converter. This is because its output frequency can be varied by varying the applied input voltage. As discussed earlier, pin five I usually the voltage control pin. Its main function is to control the trigger and the threshold levels. The voltage across this pin is normally give as the two third of the Vcc. This is so because of the internally built voltage divider. When an external voltage is applied to this terminal, the control voltage can be changed. The voltage across the capacitor also known as the timing capacitor I shown on figure 1.3. on increasing the voltage, the charging and the discharging time of the capacitor increases. This decreases the frequency. It can therefore be concluded that the frequency can be varied by varying control voltage. Thus, the circuit is known as a VCO. 555 timer based delay circuit This circuit is normally used to delay a pulse of the give circuit before using it for any other process. The timer circuit shown on figure 1.4 explain the delay circuit (electronics project design n.d) The delay time of this circuit can be varied by varying the resistor value VR1 and the value of the capacitor E base on the following time delay formula For the output pin to be in HIGH state, the reset Pin four must also be at a high state and the trigger pin two’s voltage level should be below a third of the VCC. With no pulse being applied to the chip’s input, the transistor Q1 turns ON and the capacitor is charged. Applying pulse at the input turns off the transistor Q1 and the reset Pin 4 remains at HIGH state. This discharges capacitor E through the resistor VR1. The time delay depends on the discharged capacitor. This takes it to a third of the VCC just before the 555 timer’s output goes high. Figure 1.4: 555 timer based delay circuit Equipment and components 555 timer oscillator The following lab equipment were used in carrying out the experiment Equipment A solder less breadboard Dc power supply unit (PSU) Digital multi-meter (DMM) Oscilloscope Components that were used in the experiment included Resistors (330kΏ, 220k, 5x100k, 1k, 2x5.1k, 1k, 82, Capacitor (F): 10n, 22n, 100u (tantalum) Chips: LMC55CN LEDs On/off switch Experimental method and procedure The following procedures were followed in designing this experiment The circuit show on figure 1.6 was built on a breadboard The output to this circuit was connected to the oscilloscope Both the minimum and the maximum values for V2 and Vout were recorded. The durations for Vout= high and low and the period of the signal were also recorded The waveform of the Vout with the waveform of Vc for the NOR gate were compared. The value of RA was increased to 330k ohm and step 1 was repeated The value of RA was reset to 100k and RB was changed to 330k. Step (a) in test 1 was repeated Test 3 The values of RA and RB were set to be equal. That is RA=RB. The measurement on test 1 (a) was repeated. Test 4 The supply voltage Vcc was reduced to 3V The measurement on test 1 (a) was repeated. Figure 1.6: 555 timer osillator circuit 555 timer chip as a voltage controlled oscillator The Vcc was set to 9V A voltage of 5V was applied to pin 5 The values of V5 were varies between 0 to 8 V at steps of 1V The delay unit A circuit show on figure 1.5 was built The switch was closed and time was recorded The value of R was doubled to 200K Observations, data, Findings and results 555 timer oscillator On building the 555 timer oscillator circuit and carrying out the tests given, the following graph was obtained from the oscilloscope. This was obtained from the test one Figure 1.7: screen shot of a graph for 555 timer oscillator On carrying out test 2, a graph shown on the figure 1.9 Resetting the value of RA to 100k, and changing the value of RB to 330k, a graph as shown on figure 2.0 was obtained c) The wave form shown on figure 2.1 was obtained. This wave form was based on adding a NOR gate to the oscillator Test 3 On setting the values of RA and RB to 100k and reducing the supply voltage to 6V, a graph shown on figure 2.2 Results for test 4 Reducing the supply voltage to 3V and repeating the test on test 1 (a), a graph shown on figure 2.3 Based on the results obtained on test 3 and 4, the relationship between Vcc and the following results can be obtained from the readings Maximum value of V2 Minimum value of V2 And the maximum value of Vout 555 chip as a voltage controlled oscillator (VCO) Results shown on table 1.0 were obtained from the 555 timer based VCO Results Discussion Results on 555 timer oscillator From the graphs obtained on the tests carried out, it can be seen that, the capacitor is charging up to two thirds of the VCC. This process can be related to the equations Equation one above shows the charging time while equation two is the discharging time. The frequency of the circuit is related by the equation three shown below. From the frequency equation, it can be deduced that frequency changes with changing resistor and capacitor values. It is maximum when these values are minimum Plotting the graphs Graph one, a graph of Vminimum against V5 A graph of V2 maximum against V5 A graph of Vout Max against the V5 REFERENCES Collin Mitchell 2012, 50-555 timer circuits, Talking Electronics HFB400UB Datashhet 1994, integrated circuits database, Philips electronics Professor Barry Parton 1998, Fundamentals of Digital Electronics, National Instrument Corporation Anil K. Maini 2007, Digital Electronics, Principle, Devices and Application, John Wiley and Son Limited, England Read More