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VLSI Technology and Reliability - Essay Example

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The History and Development of VLSI CMOS Technology Abstract The focus is mostly on the improvements that have occurred in CMOS technology. We explore the different fabrication methods that are used to bring this into a reality. Some of these methods are the SOI-wafer, p-wafer and n-wafer…
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VLSI Technology and Reliability
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Introduction Every day in the word transistors sizes and costs are decreasing while as their speed is increasing. The formation of MOS takes place by superimposing several layers of insulating, conducting and transistor forming materials. The CMOS technology provides two types of transistors namely the n-type transistor and the p-type transistor. Motivation The rapidity with which hardware technology is changing motivated writing of the paper. The main aspect was the reason that the hardware prices are getting cheaper while its quality is improving.

History of CMOS The CMOS were invented in 1963 by Frank Wanlass. This technology has been used in every electronically digitally integrated circuit in the modern world. This has been made possible by their operating speed also reduction of size in every subsequent production of CMOS (Thes, 2008). The development in CMOS technology tends to rely on Moore’s law, which stated that, “an approximate 30% reduction in linear dimension and introduction of products with the new technology 2 years after the previous” (Sadan & Current, 2002).

Figure 1: The three types of CMOS processing n-well, p-well and twin-well (Baker & Jacob, 2010). SOI (Silicon on Insulator) well fabricator on CMOS It was used in selected discrete and integrated circuits in 1960s. It was developed to be used for space exploration making it used in early satellites and space exploration systems (Colinge, 2010). These devices were fabricated with SOS (silicon on sapphire), but recently they are fabricated with SIMOX (separation by Implanted Oxygen). In recent world, SOI fabricators continue to be researched on due to their use in fabrication of the CMOS’s ICs (Marshall and Natarajan, 2002).

Industry players believed by 2006-2008 there would be a huge shift to the fully depleted SOI CMOS would occur. During 2010, it was believed that 10% of the transistors would have been using this technology (Baker & Jacob, 2008). Modern usage of SOI wafer 1. IBM is using it in the high-end RS64-IV “Istar” PowerPC-AS microprocessor in 2000. 2. The making of AMD microprocessor. 3. Used in play station 3 and Wii. 4. Making of Intel processors. 5. Used in silicon photonic. Advantages of SOI 1.

They were resistant to ionization by radiation which would have taken place due to the solar wind radiation in space. 2. It was also preferred due to the robust voltage isolation of IC. 3. Due to its ability to offer perfect transistor count which has led to lower leakage in transistors. This characteristic has led to continue use of SOI even in the modern world. 4. It is also known for faster performance and lower power consumption due to its reduced parasitic drain capacitance. 5. It ensures higher transistor count which ensures tighter transistor packing in devices.

This ensure in reducing the size of devices. 6. It is seen to be less complex making it a choice by many to use. 7. The buried oxide plays a role within by offering thermal insulation in SOI. This insulation has an effect of elevating temperature within the SOI device which modifies the output of the device. 8. There is complete avoidance of the latch up problem. Disadvantages 1. The absence of substrate diodes complicates the protection of input and outputs against the ESD pulses. 2. The SOI technology is believed to be expensive making it not to be widely used in the modern world.

This is brought forward by the need of single crystal sapphires. 3. There is a predicament with this technology

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