RF Integrated Circuits-electrical engineering - Thesis Proposal Example

RF Integrated Circuits Wireless communications at RF are able to provide services to users during mobility, such as cell phones, pagers and broadcasting. The use of a high frequency carrier to produce a passband signal for transmission allows the implementation of smaller antennas, besides of an efficient management of the spectrum. Due to the development of the fabrication technology of integrated circuits, it is possible to design complex ICs that consist of analog and digital circuits on the same chip.

Today, the CMOS technology is a good alternative for RF circuits integration, since it can work in the GHz frequency range with low noise figure. The metal-oxide-semiconductor field-effect transistor (MOSFET or MOS) is a four terminal device that can operate in three different regions – cut-off, linear and saturation regions – that states the current it can supply depending on the voltages applied to those terminals (Rabaey 57). Static Complementary MOS (static CMOS) is the most widely used logic style, because it presents some important characteristics: low sensitivity to noise (robustness), good performance, low power consumption, availability in standard cell libraries, among others.

Also, the BiCMOS technology has become a viable option for RF applications. The main challenge in the design of RF circuits for products is due to the little operation margins given by the constraints on power consumption and noise (ENZ 189). It is not simple to do the IC design in an environment that is mostly used for digital electronics by involving a RF part. It can be said that the RF parts of an IC do not interact properly with the digital parts, since there is a tendency of noise from one part getting into the other.

One possible solution is to isolate the RF circuit by shielding it. The modeling of the MOS transistors for operating at RF should be able to accurately predict the performance of the circuits. Therefore, the models to be used in the simulation of RF circuits in the GHz frequency range must account for some physical phenomens such as the signal coupling through the substrate. This coupling is resultant of the small impendances of the junction capacitances at high frequencies, what causes the RF signal at the drain to couple to the nearby source diffusions and to the substrate. (ENZ 190) suggests that it can be an advantage to move the operational point of MOS transistors operating at RF from strong inversion to moderate inversion in order to get higher current efficiency and lower electrical fields within the device.

This would avoid some undesirable effects such as velocity saturation of carriers in the channel and hot carriers, which is due to the injection of additional electrons into the gate oxide near the interface with silicon. Short range communications make use of single chip transceivers implemented with on-chip power amplifiers. The efficiency of these amplifiers can be improved by using off-chip high quality factor (Q) inductors. The production of high Q on-chip inductors on silicon (Si) is still a challenge for many designers, especially due to losses via substrate.

(CHEN et al. 1289) presents the so-called patterned ground shield technique to reduce the loss of the inductor through Si substrate, which proposes the use of a conductive plane underneath the inductor to shield the electromagnetic field from the substrate. Works Cited Rabaey, J.M., Chandrakasan. A., Nikolic, B. Digital Integrated Circuits: A Design Perspective. Upper Saddle River: Prentice Hall, 2005. Enz, C. “MOS Transistor Modeling for RF Integrated Circuit Design”. Proceedings of the IEEE Custom Integrated Circuits Conference (2000):189-196.

Chen, Emery Y., et al. "Q-Enhancement of Spiral Inductor with N+ -Diffusion Patterned Ground Shields". IEEE MTT-S Digest (2001):1289-1292.