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Data Framing, Transmission and Reception of Serial Data - Assignment Example

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The author of this design paper "Data Framing, Transmission and Reception of Serial Data" will make an attempt to design an RS232 ASCII transceiver as part of the standard serial port device that is able to convey both parallel and serial formats…
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DESIGN OF AN RS232 ASCII TRANSCEIVER Client Insert Name Client Insert Institution Client Insert Due Date Design of an RS232 ASCII Transceiver Introduction An RS232 American Standard Code for Information Interchange (ASCII) which was formally referred to as TIA-232 works to transmit data over a simple un-terminated, multi-conductor cable at rates that can reach over 20kbps. The ASCII for the R232 helps specify the electrical characteristics and connection for an interface that is all-encompassing with which has point-to-point modern interface. There are different transceiver versions of the RS series with RS562 being the older version that has lower voltage ratings compared to the RS232 model with the latter also specifying a minimum driver output voltage of ±5V (Ögren 2008). Using what is referred to as linear technology, it is possible to combine single, dual transceivers that can range up to give RS232 drivers and receivers for power supplies that range from 1.8 v to 5.5 v (Ögren 2008). This design paper therefore seeks to design an RS232 ASCII transceiver as part of the standard serial port device that is able to convey both parallel and serial formats. In this regard, the paper will focus on the part regarding data framing, transmission and reception of serial data using the standard RS232 device. Design Functionality In order to appreciate the manner in which this design will operate, it is good to indicate in considerable detail what actually constitutes the operation of an RS232 ASCII transceiver. According to Lawrence (2010), it is a method or as often referred to, protocol, that defines the transfer of data between two different devices using just a few numbers of wires. Using this format, data is only transmitted in a single direction for each wire which means that in order for there to be a bi-directional communications, there must be two different wires (Lawrence 2010). In its simplest form, the designed RS232 will be a synchronous communication protocol which will make it possible for the transfer of data between electronic devices simultaneously. In order for the standard designed in this paper to properly function in transferring single data over a serial cable with 3 to 22 signals, it will have to operate at speeds of between 100 to 20k baud (Wilson 2000). This design will use baud rates of 9.6k having a cable length of up to 50ft. In this way, the design will be able to transmit a block of data by transmitting individual bytes one after another (Wilson 2000). Design Research According to Wilson (2000), the RS232 as has been defined in the introductory remarks of this design paper is a standard for serial communication and transmission of data. In its rudimentary form, an RS232 standard provides the framework through which signals that connect Data Terminal Equipment (DTE) like a computer terminal, and a Data Circuit-terminating Equipment (DCE) like a modem and this makes the commonest application of the RS232 standard to be in computer serial ports (Mackay, Wright, Reynders & Park 2004). In order for the standard to function properly, it requires to perform three different functions according to Mackay, Wright, Reynders & Park (2004), and these are the following: 1. Electrical characteristics of the signal under consideration 2. The Timing of the signals 3. The meaning of the signals under consideration 4. The identification of the physical size and pinout of all the connections of the circuit Given the central application that RS232 have in modern use today, it has become a standard feature for personal computers primarily used for connections of printers, mice, modems, and Uninterruptible Power Supplies (UPS) among other peripheral devices used with computers (Mackay, Wright, Reynders & Park 2004). Despite this extensive usage within the computer world, there are a number of limitations that RS232 standards have which requires additional design development and research to make them more effective and efficient in their connectivity and data transmission. The following are the key limitations that are associated with this standard according to a review of different literatures: The characteristic voltage swings and the need for positive and negative supplies make it difficult for the standard’s capacity to become compatible as an interface The standard is limited in its speed and compatibility specification when it comes to multi-drop where the connection of more than two devices is desired The standard has its two end links asymmetrical which makes it difficult for designers to link them with other devices. In this regard, the designer has to determine whether to use a DTE-like or DCE-like interface as well as the designated connector pin to use (Mackay, Wright, Reynders & Park 2004). The standard recommends the use of 25-way connector which is sufficiently large compared to what is currently in use in common practice today (Mackay, Wright, Reynders & Park 2004). The standard does not envision the capacity to connect a DTE directly to a DTE or a DCE directly to DCE (Mackay, Wright, Reynders & Park 2004). In summary therefore, Mackay, Wright, Reynders & Park (2004) identify low transmission speed, large standard connectors, and large voltage swings as the most significant limitations of the standard for which peripheral design and research is necessary to deal with these shortcomings. It is because of these shortcomings that in modern usage today, the USB has displaced the use of RS232 transceivers in its usage and compatible application in computer peripheral use (Mackay, Wright, Reynders & Park 2004). This notwithstanding, RS232 devices are still in common use today especially in industrial machines, scientific instruments as well as networking equipment (Mackay, Wright, Reynders & Park 2004). The Working of an RS232 ASCII In its basic form, an RS232 ASCII serially transmits data uni-directionally over a pair of wires where outgoing data is labelled Tx (denoting transmission) and incoming data is labelled Rx (denoting reception). In order for there to be a two way communication, there must be at least three wires, that is Tx, Rx, and GDN (denoting ground) and when the Tx and Rx are crossed, the two systems are able to talk to the opposite unit (Mackay, Wright, Reynders & Park 2004). The standard transmits each byte at a time and the transmitted byte is not usually synchronized to the receiver having an asynchronous protocol. This means that it does not have a lock signal which requires that the software at the end of every communication be set up exactly as the serial decoder it is attached to so as it is able to decode the serial data stream (Mackay, Wright, Reynders & Park 2004). Figure 1 below shows the RS232 transmission of the letter J Fig. 1: RS232 Transmission of the Letter J Source: (Robinson & Cargill 2015, p. 79) Individual Design Figure 2 shows the screen shot of the individual design of the RS232 transceiver ASCII. The coding of the design is indicated in figure 3 below as well. Fig. 2: The Screenshot of the RS232 Transceiver ASCII Fig. 3: Screenshot of the coding of the RS232 Transceiver Design This design of the RS232 ASCII transceiver focuses on its baud and how works. From the design and research done, the baud, which is refers to the transmission speed required in bits per second for the standard will seek to define the frequency of each bit period in its operations (Robinson & Cargill 2015). In this regard, a baud rate of 2400 bits per second (bps) will have a frequency of 2400Hz with a bit per period of 416.6 us. This information will be critical in helping the standard to recover the bits from the data stream. The Voltage Level Operations of the RS232 ASCII Transceiver Design In order for this design to work over long cables, higher voltages have to be sent from each of the transmitters which should be sufficient enough to cater for the cable resistance when there is a voltage drop across it as the signal travels through the cable. The typical voltage ranges from +5V to +25V where the signal transmits a logical zero and from +5V to -25V the signal transmits a logical one (Robinson & Cargill 2015). The signals transmitted through the cable will generate the same voltage level such as CTS, DTR, RTS, or DSR which means that the standard has to be coupled with many level translator chips for a full interface for longer transmission. For short distances, Tx and Rx and the ground are sufficient usually. According to Robinson & Cargill (2015), the whole ±25V is not usually used in common practice but instead it is ±12V which is usually used – an output that is obtained by MAX232 transceiver chip. From this design, the mark (represented by logical one) is sent as a -12V and a space (represented by logical zero) is sent at +12V which means that the logical sense will be inverted. When it comes to the RS232 receiving a data stream, its input voltage level is defined as ±3V which means that logic zero can only be received when the voltage is more than 3V and a logic one can only received when the voltage is smaller than –3V (Bemer 2012). This is important as it helps the signal to have room for losses as it travels down the cable providing noise immunity which when it is within the level of ±3V, the standard can tolerate it without having any significant effect on the receiver. Design Testing The testing approach used for this design is prepared based on the RS232 ASCII settings described below. For this procedure, the default setting of the standard was set to 9600 baud, 8 bits, with no parity and handshaking software with the test only used the Tx, Rx and ground signals. At the board level, the Clear to Send (CTS) Request to Send (RTS) signals are tied together and this helps to enable any device that requires the CTS signal to send data (Bemer 2012). When these settings are made, the standard would work since it sets its own RTS signal as high and connecting the two signals together helps to ensure that CTS remains high for all the time that the device is connected to the standard (Bemer 2012). The testing also uses the PIC 18F4455 that has only one UART hardware which can also have multiple software UARTs created. For this, each UART is assigned with a different set of transmit and receive pins and in this case, three UARTs are used, one hardware and two software each of which is associated with RS232 ASCII. Table 1 shows the typical baud rate settings that were obtained from the testing of this design: Table 1: Baud Rate Settings obtained for this design Design Integration In order to ensure that design was well integrated into the system so as to provide the results required, all the power ratings and setting recommendations obtained from research were followed and adhered to. As indicated in table 1 above, the design was framed to work within the indicated rating settings which were followed ardently. Being a standard that is highly dependent on the voltage levels, it was important to ensure that its powering was from a very stable power source that was strictly set to provide regulated and stabilized voltages for the testing and running of the standard. Critical Analysis The review of this design by and large was successful. Despite the design constraints the working of the standard, it was a huge success in most parts. A start bit was transmitted at the beginning of each transmission to indicate to the receiver that a data byte was about to flow. The bit that starts within the standard allows the receiver to synchronize to the data bits of the whole signal which has the effect of allowing the receiver to create its own sample clock at the middle of each of the bits that pass through it (Maini 2007). According to Maini (2007), data bits also have a very clear and distinct shape that follows the start bit where there are usually 7 or 8 data bits where the lsb transmits itself first. This is because an ASCII is made up of alphabet which has seven bits working as control characters and the eighth bit helps to extend the characters for graphic symbols (Maini 2007). For the transmission of texts alone, 7 bits are used which leaves out one bit and helps increase transmission speed for cases of large blocks of data transmission. Figure 4 shows the how the standard transmits a character. Figure 4: Screenshot showing how the standard transmits a character Conclusion In conclusion therefore, the design of the RS232 ASCII described within this design paper was largely successful. As a systematic approach to the design, an RS 232 ASCII which was sought to be designed in this paper was defined as a standard for serial communication and transmission of data. In this regard, the design was rudimentary meant to provide the framework through which signals that connect Data Terminal Equipment (DTE) like a computer terminal, and a Data Circuit-terminating Equipment (DCE) like a modem and this makes the commonest application of the RS232 standard to be in computer serial ports. The design was aimed to develop the standard that would perform the following functions: 1. Electrical characteristics of the signal under consideration 2. The Timing of the signals 3. The meaning of the signals under consideration 4. The identification of the physical size and pinout of all the connections of the circuit As regards the design, testing, and analysis, the project was a big success and a good experience in using theoretical knowledge learnt in class to apply them to solve real life problems. Bibliography Bemer, R. 2012. “A Proposal for Character Code Compatibility”. Communications of the ACM, vol. 3, no. 2, pp. 71–72. Lawrence, T. 2010. "Serial Wiring". A. P. Lawrence, vol. 2, no. 1, pp. 32 – 35. Mackay, S., Wright, E., Reynders, D. & Park, J. 2004. Practical Industrial Data Networks: Design, Installation and Troubleshooting. New York: Newnes. Maini, K. 2007. Digital Electronics: Principles, Devices and Applications. John Wiley and Sons. Ögren, J. 2008. "Serial (PC 9)". New York: Hardware Book. Robinson, G. & Cargill, C. 2015. “History and impact of computer standards”. Computer, vol. 29, no. 10, pp. 79–85. Wilson, M. 2000. "TIA/EIA-422-B Overview". Application Note, 1031. Read More
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