Electronic Fundamentals - Term Paper Example

Electronic Fundamentals Contents 1555 Timer Integrated Circuit 2 1Construction 2 2Operation 3 2.1Astable 3 2.2Monostable 4 2.3Bistable 6 3Example: Pulse Width Modulation 6 2Field Effect Transistor 6 2.1Construction 7 2.2Operation 7 2.3Uses 9 2.4Comparison with bi-polar junction transistors 9 3References 10 1 555 Timer Integrated Circuit Oscillator circuits are critical to the functioning of any electronic device involved in cyclical measurement, or that involve periodic states or waveforms [1]. This covers a staggeringly wide array of electronic devices today. While there are a variety of ways of creating a stable oscillating signal, the 555 timer IC is one of the most widely used, due to its ease of use, low price, and stability [2]. 1.1 Construction Figure 1a - NE555 pinout [3] Figure 1b – NE555 schematic [2] Starting at the input side, the 555 consists of a voltage divider, formed by three identical resistors between VCC and ground, and two comparators. The inverting input of the first comparator is attached to the voltage divider at the level of two thirds VCC, and the non-inverting input carries the THRESHOLD signal. The non-inverting input of the second comparator is connected to one third of VCC, and the inverting input carries the TRIGGER signal. The functions of THRESHOLD and TRIGGER will be explained in the operations section. The use of the voltage divider means that the device can operate across a range of supply voltages. The outputs of the comparators are connected to the reset and set terminals, respectively, of a flip-flop gate. This is the heart of the device and is responsible for the switching behaviour utilized in most of the device’s applications. It is important to note that the rest of the circuit is connected to the complement of the flip-flop logic. The base of bi-polar junction transistor (BJT) is connected to the output of the flip-flop, and is made available to discharge (hence the signal name DISCH) external capacitors. Finally, there is an output stage that increases the available output current, and inverts the logic of the flip-flop output. 1.2 Operation The 555 has three modes of operation: astable, monostable, and bistable. Each of these modes of operation requires the connection of a slightly different set of external components. In each application, however, the basic functioning of the device remains the same: THRESHOLD Signal THRESHOLD Comparator Output TRIGGER Signal TRIGGER Comparator Output Flip-Flop Output (Complement) 555 Output > ⅔ VCC HIGH > ⅓ VCC LOW HIGH LOW > ⅔ VCC HIGH < ⅓ VCC HIGH Restricted Restricted < ⅔VCC LOW > ⅓ VCC LOW Keep state Keep state < ⅔VCC LOW < ⅓ VCC HIGH LOW HIGH 1.2.1 Astable In astable mode the 555 puts out a continuous stream of rectangular pulses at a frequency determined by the external circuit. The circuit is said to be ‘astable’ because it does not stay in a given output state, but continuously switches back and forth between high and low states. Figure 2 - Astable circuit diagram [3] The external resistor R1 is connected between VCC and the DISCHARGE pin (7), and R2 is connected between DISCHARGE and the input signals. The input signals, TRIGGER (2) and THRESHOLD (6), are connected together as well as to the external capacitor C1. This capacitor is charged through R1 and R2 when the discharge pin is isolated from ground (flip-flop output is LOW), and discharged through R2 when the discharge pin has a low impedance path to ground (flip-flop output is HIGH). The continuous oscillation of the device can be seen as follows: -C1 is initially discharged, TRIGGER is below 1/3 VCC, THRESHOLD is below 2/3 VCC, the F-F output is HIGH, and the discharge transistor is off. -C1 charges to ⅔ VCC and the flip-flop output switches to low. The discharge transistor opens and the capacitor discharges to ground through R2 and pin 7. -Once the capacitor discharges to ⅓ VCC, the logic in the flip-flop reverses, and the circuit is back to its initial state. The versatility of the 555 is demonstrated by the fact that the time constants for the switching rate are entirely determined by the external circuitry [3]: 1.2.2 Monostable A 555 configured in monostable mode delivers a single rectangular pulse when the device is triggered. The timing of the pulse, similar to the astable configuration, is entirely controlled by the external components. It is referred to as ‘monostable’ because it has only a single stable state, namely low output. Figure 3 - Monostable circuit diagram [3] The circuit is first prepared with TRIGGER above ⅓ VCC. The 555 output is low, and the discharge transistor is switched on, keeping the capacitor and THRESHOLD pin grounded. When the TRIGGER signal drops below ⅓ VCC the logic is reversed, meaning that the output becomes high and the discharge transistor opens. No longer connected to ground, the voltage on the capacitor and the THRESHOLD pin begin to rise. When THRESHOLD crosses ⅔ VCC, the flip-flop is reset and the pulse ends. The output waveform is shown below: Figure 4 - Monostable operation waveform [3] The length of the pulse is given by [3]: 1.2.3 Bistable As the name implies, a 555 timer configured in bistable mode is stable when the output is high or low. This means that it functions in the same manner as a flip-flop gate. In order to get this functionality, the THRESHOLD signal is held at ground, while the TRIGGER and RESET pins are initially set to logical high. The output is assumed to begin in the low state. If TRIGGER is pulled below ⅓ VCC, the flip-flop is set and the output swings to the high state. If the RESET pin is then pulled to ground, the gate is reset and the output returns to ground. No additional external components are necessary to achieve this functionality 1.3 Example: Pulse Width Modulation Pulse width modulation (PWM) is a common means of controlling the amount of power delivered to electrical devices with inductive loads. Rather than changing the level of the voltage delivered to the device, the power is adjusted by switching the current on and off at a faster speed than the device can react. Often it is impractical, or inefficient, to change the delivered power in a system as quickly as the application requires. With PWM, the power source can run constantly while being switched on and off by another circuit. A 555 timer configured for astable operation can be used to create the timing for the PWM signal. By changing the external resistances from fixed-value components to variable ones, the width of the on and off pulses can be adjusted. This allows total control over the ‘duty cycle’ of the PWM signal, in other words the length of each pulse and pause. The 555 itself cannot drive any appreciable amount of current, so for loads larger than an LED or two, an additional amplification mechanism would be needed. 2 Field Effect Transistor Field effect transistors (FETs) are three-terminal, voltage-controlled, electronic switches. First patented in 1926 [4], it wasn’t practically realised until better semiconductor materials were available, after WWII [5]. These first FET devices were junction field effect transistors, meaning that the gate of the device was formed by a semiconductor junction. This is in contrast to metal-oxide-semiconductor field-effect transistors (MOSFETs) where the gate is insulated from the rest of the device by an oxide layer. Although JFETs were conceived of first, MOSFETs have become far more ubiquitous through their role as the switches in modern microprocessors, and their economical implementation in CMOS processing. 2.1 Construction The composition of an n-p-n MOSFET is shown in the diagram below. The converse p-n-p transistor also exists, but for this discussion an n-p-n is used. The ‘source’ and ‘drain’ are the input or output of the device, with source conventionally being the lower potential because it is then the ‘source’ of electrons, which then pass through the device and are ‘drained’. These consist of regions within the silicon body of the device that have been doped with a pentavalent element (n-doped), in order to introduce excess electrons. Metal contacts deposited on the surface of the device provide low-resistance connection to the rest of the circuit. The ‘gate’ is an electrode separated from the body of the FET by an insulating oxide layer. The area below this oxide layer is known as the ‘channel’, and the voltage applied at the gate controls the conductive properties of the channel beneath through the field effect. The channel carries the opposite doping to the source and drain. Figure 5 - MOSFET cross-section [5] FETs are most commonly made from silicon using planar processing. Silicon wafers are sliced from a large piece of circular stock, polished, and then coated in photoresist. The photoresist is exposed to a pattern of UV light, altering the chemistry of it. Some sections of the photoresist can then be washed away, leaving parts of the silicon exposed underneath in the same pattern as the UV light. Dopant atoms can then be inserted into the silicon at the exposed regions. In modern semiconductors this is accomplished through ion implantation. 2.2 Operation Without a bias voltage applied at the gate, the n-p-n junction between source and drain prevents current from flowing because one of the p-n junctions would be reverse-biased. Injecting more holes at this location (i.e. applying a positive voltage) merely creates recombination between free electrons and injected holes, increasing the size of the depletion region at the junction, and therefore the junction voltage. Applying a positive voltage to the gate, however, attracts electrons to the surface of the channel. This changes the concentration of electrons in the area underneath the gate, and when the concentration is high enough to counter the positive dopant ions, a conductive channel is opened between source and drain. The voltage is known as the threshold voltage of the FET. Figure 6 - Left to right: zero drain-source voltage, linear mode, saturation mode The thickness of this conductive layer is determined by the gate-source voltage, and that thickness in turn determines the resistance between drain and source. When a voltage is then applied between drain and source, the distribution of electrons in the conducting region is shifted towards the higher potential. If this voltage becomes sufficiently high, the conducting region will ‘pinch off’ and no longer be connected to the contact at the lower potential. This is known as saturation, and at this point the drain current is no longer proportional to the drain-source voltage. The explicit criterion for saturation is: When the gate-source voltage is between the threshold and saturation voltages, the FET is said to be operating in the linear or triode region. This is because there is a roughly linear relationship between drain-source voltage and drain current. Figure 7 - MOSFET current-voltage characteristics [5] 2.3 Uses By far the largest application of FETs is in the construction of modern microprocessors, with the most advanced processors available today each containing billions of transistors. There are two main reasons to use MOSFETs instead of BJTs: current consumption and scalability. In order to switch a BJT into the conducting state, current has to flow through the base. It may not seem like a large amount individually, but when multiplied by the hundreds of millions of switches required for a modern processor, it becomes an intolerably large amount of power and heat dissipation. MOSFETS, by contrast, consume no steady-state DC current when switched on. FETs have been made much more scalable (i.e. more switches in a smaller area) by the invention of complementary metal-oxide-semiconductor (CMOS) processing. CMOS allows digital logic to be built more compactly and with reduced power consumption by pairing NMOS and PMOS FETS switches together side-by-side. On top of their function as low-power switches, MOSFETS can also be used as precision resistors on integrated circuits. When operating in the linear region, the channel resistance can be directly controlled by adjusting the gate voltage. This plays a critical role in analogue circuits that rely on defined resistance values for correct operation. 2.4 Comparison with bi-polar junction transistors BJTs and FETs at a first glance seem to have a tremendous amount in common. The n-p-n BJT and the n-p-n FET have the following analogous structures: source  emitter gate  base drain  collector In that current flows between emitter and collector, or source and drain, when a bias is applied to the gate or base, and does not flow in absence of the bias. For both of the devices, an increase in bias results in an increase in current, and both display saturation-type behaviour (referred to in BJTs as the ‘active’ mode) when the effect of the bias is not as significant as the external voltage (collector-emitter or source-drain). The differences between the two are critical to their operation, and thus suitability for various applications. The primary difference between the two is that the gate of a FET is insulated from the conducting portion of the device by an oxide layer. This means that no DC gate current is consumed. A BJT by contrast requires continuous injection of charge from the base. This leads to an exponential relationship between current and bias voltage, as opposed to a quadratic one for the MOSFET. 3 References 1) Horowitz, P. and Hill, W. (1994). The Art of Electronics (2nd edition). New York: Cambridge University Press. 2) 555 Timer IC. (2011, January 12). In Wikipedia, The Free Encyclopaedia. Retrieved January 17, 2011, from  http://en.wikipedia.org/wiki/555_timer 3) STMicroelectronics. (1998). NE555 General Purpose Single Bipolar Timers. [Datasheet] Retrieved January 17, 2011 from http://www.datasheetcatalog.org/datasheet/stmicroelectronics/2182.pdf 4) Lilienfeld, J.E. (1930). U.S. Patent No. 1745175. Washington, DC. U.S. Patent and Trademark Office 5) Field-effect transistor. (2011, January 13). In Wikipedia, The Free Encyclopaedia. Retrieved January 18, 2011, from http://en.wikipedia.org/wiki/FET Read More