The Principle of Programmable Logic Controller - Assignment Example

rоgrаmmаblе Logic Cоntrоllеr Student Name Institution Name Course name Tutor’s Name Date Q1. Answer Difference between OUT and SET for output “SET” is an input signal in an SR latch (or an SR Flip Flop) while “OUT” is an output signal lines in the same any digital logic device (Petruzella, 2005). Secondly, Out can function independently without another signal line but whenever SET is used, it must be accompanied using a second input signal line known as RESET. Indeed, in an SR flip-flop device, which is also known as the SR Latch, there are two input lines, SET and RESET. SET literally sets the device by causing the output to be 1 while RESET literally resets the flip-flop device causing the output to be “0”. SET cannot exist in the logic circuit of an SR latch without RESET. Of course, depending on the SET or RESET condition, the output can either be 1 or 0 after RESET. Question 2: Answer a) And This is a logic circuit, which gives an output of 1 on condition that all the input signals are 1, otherwise if any one or more of the input signals are 0 then it gives an output of 0. Results Input A Input B Output AB 0 0 0 0 1 0 1 0 0 1 1 1 b) OR This is a logic circuit, which gives an output of 1 whenever one of the input signals is 1, otherwise 0 if all the input signals are 0. The OR function uses a + sign as its functional operation. Results Input A Input B Output A + B 0 0 0 0 1 1 1 0 1 1 1 1 c) Exclusive Or (EOR) This is a circuit, which gives an output of 1 if either of the input signals is 1 but gives 0 when both of the inputs are 1. It gives a 1 output when not two of the input signals are of the same state (Rabiee, 2012). An encircled + signs represent it in operations of logic circuits. Results Input A Input B Output A B 0 0 0 0 1 1 1 0 1 1 1 9 d) NAND (NOT AND) This is the opposite of the AND gate. It is a logic AND gate which is followed by a NOT gate. The NAND gate gives an output of 1 whenever any of the inputs signals are 0. Its symbol is a logic AND gate with a tiny circle at the output end. The tiny circle stands for small circle represents inversion. Results Input A Input B Output AB 0 0 1 0 1 1 1 0 1 1 1 0 e) NOR (NOT OR) This is a logic gate that is opposite to the OR gate. It is made up of an OR gate preceding a NOT gate (Webb & Reis, 2003). The NOR gate gives an output of 0 if any of its input signals is 1 and an output of 1 if all of its inputs is 0. Its symbol is made up of an OR gate and a small circle for inversion of the output. Results Input A Input B Output A + B 0 0 1 0 1 0 1 0 0 1 1 0 Q.3 Q3 Answers: a) Add - Addition This function adds the value of the two source devices and stores the result in the device at the destination It uses the following Steps in the implementation of its program 13 - Steps and 7 - steps ADD, ADDP DADD, DADDP b) Sub - Subtraction This function does the subtraction of one source device from the other and then stores the results in the devise at the destination. It uses 13 - Steps and 7 - steps in its program as follows: 13 - Steps SUB, SUBP: 7 - Steps DSUB, DSUBPe c) Mul - Multiplication The MUL function does the multiplication of two source devices and then stores the product in the source destination. It uses 7 - steps and 13 - steps in its program implementation as follows: 13 - Steps MUL, MULP: 7 - Steps DMUL, DMULP: d) Div - Division The DIV Function divides the value of one source device by the value of the other source devise and stores the result in the destination device. It uses 13 – steps and 7- steps as follows: 13 - Steps DIV, DIVP: 7 - Steps DDIV, DDIVP: e) ZRST This function is used when resetting a given range of similar devices in a single operation (Ridley, 2004). It operates when one operand is less than or equal to the second operand. It uses five steps in its operation and implementation of the Program Steps 5 - Steps ZRST, ZRSTP: f) CMP (Comparison) This operation compares two values (floating point numbers) – using the comparison operations =,> and . It uses 13 – steps as follows 13 - Steps DEZCP, DEZCPP: The operation compares a single data value such as D3 to a data range of floating point data values D1 to D2. Q.4 Answers: (a) The data register is usually placed in the destination devices to store results of various operations. It uses instructions with the double word format such as DEADD and DEADDP in every source data as well as the destination data. Destination devices use 2 consecutive data registers in order to store 32 bit data all in floating point with the exception of the K or H. An external diagnosis circuit is programmed while the PLC monitors special data register and displays the state. This state is the lowest activated state from the range in the annunciator. Answer (b) a) Special diagnostic auxiliary relays M8000, M8002, M8033 and M8034 A PLC uses diagnostic auxiliary relays to execute a specific operation depending on the instructions of the user who is driving the coil (Jones, 2006). A Programmable Logic Controller usually has several special auxiliary relays, each of which has specific functions. Every special auxiliary relay is classified into two types as follows: Type 1: Using special auxiliary relays contact The programmable logic controller automatically drives the coils. The user defined programs only uses the contacts of these coils. Type 2: Driving special auxiliary relays coils A Programmable logic Controller executes a predefined special operation whenever a user drives these coils. References Jones, C. T., 2006. Programmable Logic Controllers: The Complete Guide to the Technology. Melbourne: Brilliant-Training. Petruzella, F. D., 2005. Programmable logic controllers. New York: McGraw-Hill. Rabiee, M., 2012. Programmable Logic Controllers: Hardware and Programming. Illinois: Goodheart-Willcox Publisher. Ridley, J., 2004. Mitsubishi FX Programmable Logic Controllers: Applications and Programming. New York: Elsevier. Webb, J. W., & Reis, R. A., 2003. Programmable logic controllers: principles and applications. Tollesbury: Prentice Hall PTR. Read More