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The Difference between Softcore Processors and Hardcore Processors - Essay Example

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The paper "The Difference between Softcore Processors and Hardcore Processors" examines a  distinction between softcore and hardcore processors in terms of design and functionality.  Soft processors are important in the advancement of technology and the acceleration of development…
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The Difference between Softcore Processors and Hardcore Processors
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? Soft Processor al Affiliation) Core processors are one of the most, if not the most, important computer components ever invented. They have evolved over the years from big, expensive devices, to small, cost-efficient, and powerful computer components. Processors effectively run computers, and their production is big business. Companies rake in billions of dollars every year just by manufacturing processors. There are two types of processors: soft core processors and hard core processors. This paper will discuss all aspects of sot processors, and also compare them with hard core processors in order to bring out the distinction between them. This is important because laymen and some scholars often confuse them with each other in terms of their design and functionality. At the end of this paper, I intend to have achieved two main objectives: examine and discuss all aspects of soft core processors, and show a clear distinction (in terms of design and functionality) between soft core and hard core processors. Key words Core processors, soft core processors, hard core processors Introduction A soft processor is a patented core that is based on the Field-Programmable Gate Array (FPGA) logic primitives (Chu 2012, pg. 31). A hard processor, on the other hand, is a patented core that is based developed from dedicated silicon. In this regard, it is built directly onto non-reconfigurable silicon. A real example of a soft-processor is the Xilinx MicroBlaze processor core. This is a 32-bit processor core that is also a Reduced Instruction Set Computer (RISC). It has the following features: Harvard bus architecture Highly configurable cache Exceptional handling capacity and two levels of interruption A standardized core connect bus interface manufactured by IBM 3-stage pipeline Thirty-two registers for general purpose This processor can operate at up to 250MHz based on a Virtex-4 (4VLX40-12) component. Between 1000 and 2700 Xilinx LUTs (Look-Up tables) are required for the implementation of a MicroBlaze soft processor, depending on the manner in which the processor is configured. Background FPGA (Field Programmable Gate Array) An FPGA is an integrated circuit (IC) that is capable of being programmed to perform any logical function. FPGAs usually have many gates (sometimes even millions) which can be interlinked in any configuration required to resemble a logic circuit. Such interconnections are performed entirely using software. This is done by uploading a modified hardware definition for a logic circuit) to an FPGA. The FPGA will subsequently assume the attributes of that logic unit. The logic unit is defined using a HDL (hardware definition language). An FPGA is made up of a complex matrix/assembly of logic cells (Yiannacouras 2005, pg. 36). The FPGA is a general-purpose component that is full of digital logic building units. The two dominant firms in the FPGA industry are Xilinx and Altera. The most primitive building block used in FPGA is known as an LE (Logic Element) by Altera or an LC (Logic Cell) by Xilinx. In both cases, the building block is made up of an LUT for logical purposes and a flip-flop for purposes of storage. Apart from the LE/LC block, FPGAs also include clock management, multiplication blocks, memory, and input/output (I/O). LE/LC is often used in finding system costs. FPGAs offer hardware designers great flexibility. Although pioneer designers primarily employed FPGAs in debugging and prototyping, most commercial end-products now integrate FPGAs. Designers who use FPGAs are able to develop hardware components or entire systems quickly while still balancing the debugging and prototyping benefits that FPGAs have over application-specific integrated circuit (ASIC) designs (Iniewski 2013, pg. 35). Constant increases in FPGA architectural features, performance, and capacity are allowing more designs to be implemented through FPGAs. To further this, FPGAs costs are declining, enabling designers to integrate FPGAs with 1 million similar gates for less than $13. In spite of the fact that designers can employ FPGAs to quickly develop efficient and effective hardware designs, most systems require both hardware and software to be combined. In the late 90s, FPGA vendors started selling single-chip FPGA/microprocessor devices. Such devices encompass one or more hard core microprocessors and one FPGA fabric built on one IC, and offer efficient procedures and processes for communication between an FPGA and the microprocessor (Chu 2012, pg. 65). These devices were first made available by Atmel and Triscend. They incorporated FPGAs and low-end microprocessors that support gates numbering tens of thousands. Altera recently created the Excalibur devices that have a 1 million gate FPGA and an ARM9 processor. Xilinx has released the Virtex-II Pro range of devices that incorporate an FPGA fabric and 2 or more PowerPC processors with gates numbering tens of millions. Although single-chip hard core FPGA/microprocessor platforms provide excellent communication and packaging advantages, soft cores come with the benefit of lower component costs and flexibility. Most FPGA vendors now offer soft core processors that can be implemented by designers by employing a uniform FPGA (Flynn & Luk 2011, pg. 37). Programmable language (VHDL/Verilog) HDLs facilitate the simulation of designs in the early stages of the design cycle so as to rectify mistakes or experiment with varying architectures. VHDL and Verilog HDLs are both compatible with the Xilinx Synthesis Tool (XST), a program which synthesizes/constructs FPGA hardware definitions using an HDL. XST is usually analogous to compilers (Yiannacouras 2005, pg. 29). VHDL is different from a software language; its expressions are basically definitions of logic devices, and variables (also called signals) resemble connections between registers or devices. VHDL statements normally implement in parallel, whereas statements compiled in software languages are often implemented sequentially, Verilog and VHL have similar capabilities, but VHDL is usually preferred because it is similar to Ada, a programming language that is also fundamental to the execution of statements (Iniewski 2013, pg. 45). Verilog is one of the most popular HDLs used by IC designers. Designers defined in HDL are usually easy to develop and debug, technology-independent, and more understandable compared to schematics, especially for large circuits. Verilog can be employed in the description of designs at 4 levels of abstraction: (a) algorithmic level; (b) register transfer level, which uses registers linked by Boolean equations); (c) Gate level (interconnected NOR, AND etc); and (d) switch level. Verilog also describes constructs that can be employed in the control of input and output during simulation. Lately, Verilog has been employed as an input in synthesis languages which will generate a netlist (gate-level definition) for the circuit (Chu 2012, pg. 67). There are Verilog constructs which are not synthesizable. In addition to this, the manner in which the code is written will greatly impact the speed and size of the synthesized circuit. There are 2 types of code in a majority of HDLs: (i) procedural, which is employed in circuits that have storage; and (ii) structural, which is an oral wiring sketch without storage. Procedural codes are written in a similar way to c codes and assume every task is stored in memory until it is overwritten. For construction with flip-flop storage, this form of thinking creates excessive storage. It is however favored by most people because it is normally easier to write. For instance, it is the only code that supports case and if statements. The synthesizers have therefore been constructed so as to recognize specific types of procedural code as really combinational. They produce a flip-flop just for left-hand variables that really need to be stored. It is however advisable to avoid wandering from this style, or else your synthesis will start filling with superfluous latches (Flynn & Luk 2011, pg. 49). Design tools (Xilinx, Altera) Xilinx provides 2 main design tool packages that support the demands of the next ten years of programmable frameworks requiring the need for improved productivity and aggressive pace. These packages/suites are: i) Xilinx Vivado™ Design Suite This is a revolutionary system-focused and IP design environment that enhances developer performance for dramatically faster implementation and integration with up to four times increase in run times and a user-friendly IP-centric model. Enhancing the creation of smarter systems calls for levels of automation that exceed RTL level design. The Vivado™ Design Suite offers system-and IP centric, SoC-power, next generation development conditions that have been created from the ground up in order to solve productivity problems in system-level implementation and integration (Fort 2006, pg. 44). The Vivado™ Design Suite brings a lot of productivity and value to system-level development. Value and productivity come in form of the following: speeding time to integration, accelerating time to verification, accelerating time to implementation, and improving resource allocation and quality of results. ii) Xilinx ISE® Design Suite This suite continues to introduce innovations to a broad pool of developers, and extends the popular design flow to Xilinx’s range of All Programmable devices, including Zynq™-7000 All Programmable SoC and pre-7 and 7 series devices (Yiannacouras 2005, pg. 21). It comes in three editions: a) SE Design Suite: Embedded Edition b) ISE Design Suite: System Edition c) ISE Design Suite: WebPACK Edition Additional tools/options that come with these editions include: Partial Reconfiguration, Embedded Development Kit, High-Level Construction/Synthesis, and System Generator for DSP. Altera also offers a design tool package that includes the following: a) Quartus II Software Offers productivity and high-performance methodologies that are necessarily resemble earlier ASIC design flows, as well as attributes that allows for the easy and successful design of HardCopy ASICS and Altera FPGAs (Iniewski 2013, pg. 24). This also provides some novel technologies that accelerate system design and exploit FPGA in-system verification. Although Quartus II software supports RTL synthesis, verification ASIC design flow, and place-and-route, it does not need some of the test design procedures and physical design necessary for tailored ASIC designs. b) ModelSim-Altera Software This is recommended for modeling all FPGA designs. It has no line limitations and its simulation performance is 33% faster than earlier versions. c) SoC Embedded Design Suite The Altera® SoC Embedded Design Suite (EDS) includes utility programs, development tools, application examples, and run-time software that facilitate application software and firmware development on the Soc hardware platform of Altera (Iniewski 2013, pg. 19). d) Nios II Embedded Design Suite This is a comprehensive development suite for Nios II software design. It comes with device drivers, development tools, software, bare metal HAL (Hardware Abstraction Layer (HAL) library, an assessment version of an actual operating system, and a commercial level network stack program (Yiannacouras 2005, pg. 48). e) DSP Builder This allows one to shift from system simulation and definition using the industry-recommended MathWorks Simulink tools to the implementation of systems in just a few minutes. The DSP Builder Signal Compiler unit block reads .mdl files that are developed using MegaCore® units and DSP Builder and produces Tcl scripts and VHDL files for simulation, hardware implementation, and synthesis (Fort 2006, pg. 18). Soft-processor Architecture Soft core processor architecture is based on the functions and requirements of a particular processor. There are however standard/common architectures that are used by different companies to build soft core processors. They include the following: SPARC-v9: used on S1 Core SPARC-v8: used on LEON2 and LEON3 OpenRISC 1000: used on OpenRISC 1200 MicroBlaze: used on MicroBlaze, aeMB, and OpenFire Nios II: used on Nios II/f, Nios II/s, and Nios II/e LatticeMico32: used on LatticeMico32 ARMv6: used on Cortex-M1 DSPuva16: used on DSPuva16 PicoBlaze: used on PicoBlaze LatticeMico8: used on LatticeMico8 Soft Processor Advantages Soft processor cores allow designers great flexibility when designing, hence enabling them to configure the processor in a way that meets the demands of their systems (e.g. including/excluding specific datapath coprocessors or including custom commands) and to incorporate the processor into any FPGA quickly (Fort 2006, pg. 27). Compared to hard core processors, soft core processors also allow designers to integrate different numbers of processors within one FPGA design depending on the needs of an application. Some companies also developing chip designs that integrate over 5 processors on average. Power Soft core processors generally consume more power (averagely 30% more) in comparison with hard core processors (Flynn & Luk 2011, pg. 43). Size Soft core processors range from 192-60,000 Logic Elements (Les; the unit for measuring area of processors which consists of a flip-flop and a 4-input LUT and a flip-flop. Efficiency Soft processors are considered much less inefficient when compared to hard core processors. It is important to note that this statement is strictly based on comparison with hard core processors (Fort 2006, pg. 42). Efficiency is measured in terms of power consumption and speed, and it has been determined that soft processors are slower but still consume more power when compared to their hard core counterparts. Processor Processor type Device Family Speed (MHz) DMIPs (performance level) ARM922T Hard Excalibur 200 210 PowerPC 405 Hard Virtex-4 450 680 MicroBlaze Soft Virtex-II Pro 150 123 MicroBlaze Soft Spartan-3 85 65 Cost Soft core processors are averagely cheaper compared to hard core processors. Soft processors have a number of attributes which make them cheaper overall. These are: a) Flexibility/ More allowance for reusing designs b) Reduced risk of obsolescence c) Simplified design change or update d) More design implementation options using design modularization e) Easy debugging Time to Manufacture Soft processors take a lot of time to manufacture because the process of embedding them on FPGAs is a complex and time-consuming one. Applications Soft processors are usually used to develop a system-on-chip (SoC) that is based on an FPGA (Flynn & Luk 2011, pg. 23). In this case the processor controls the functions of the circuit and performs some random calculations, while the other sections of the circuit do parallel processing and interfacing. Soft vs. Hard Processor Soft Processor Hard Processor Built on FPGA fabric Built from transistors Customizable Cost millions to manufacture Can satisfy application-specific demands Faster in speed Use less power Research Area My area of interest when it comes to research is Acceleration of scientific code on multicore GPUs CPUs, and FPGAs. Conclusion Soft processors are important in the advancement of technology and the acceleration of development in terms of processor creation, performance, efficiency, and relevance. In this regard, research should be encouraged and intensified in order to make them better, more efficient, powerful, and suitable to changing needs and demands. More efforts should be made so that soft processors match hard core processors in terms of cost-efficiency, performance, and efficiency, while improving on their strengths. References Chu, P. P. 2012, Embedded SoPC design with NIOS II processor and Verilog examples, Wiley Hoboken, N.J. Flynn, M. J., & Luk, W. 2011, Computer system design: system-on-chip, Wiley, Hoboken, N.J. Fort, B. 2006, A multithreaded soft processor, Wiley-Blackwell Publications, New York. Iniewski, K. 2013, Embedded systems: hardware, design, and implementation, John Wiley & Sons, Inc., Hoboken, New Jersey. Yiannacouras, P. 2005, The microarchitecture of FPGA-based soft processors, Penguin, London. Read More
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